Ok_老虎社区_美港股上老虎

MamaLee
2021-12-12

Intel shows research for packing more computing power into chips beyond 2025

Dec 11 (Reuters) - Research teams at Intel Corp on Saturday unveiled work that the company believes

Intel shows research for packing more computing power into chips beyond 2025

免责声明：上述内容仅代表发帖人个人观点，不构成本平台的任何投资建议。

推荐
最新

暂无评论

热议股票

关于我们·老虎社区守则·老虎社区账号管理规范·老虎社区服务协议·老虎社区隐私政策

公司名称：北京至简风宜信息技术有限公司

违法和不良信息投诉：010-5681-3562（工作时间9:30-18:30）

邮箱：service@laohu8.com

营业执照：91110105MA01A4U55R

ICP备：京ICP备18016422号

网安备：京公网安备11010502036490

关注我们

{"i18n":{"language":"zh_CN"},"data":{"magic":2,"id":604095389,"tweetId":"604095389","gmtCreate":1639276874261,"gmtModify":1639276874539,"author":{"id":3579998898288031,"idStr":"3579998898288031","authorId":3579998898288031,"authorIdStr":"3579998898288031","name":"MamaLee","avatar":"https://static.tigerbbs.com/3b65143242ad70cd231ddce7436fdb25","vip":1,"userType":1,"introduction":"","boolIsFan":false,"boolIsHead":false,"crmLevel":5,"crmLevelSwitch":0,"individualDisplayBadges":[],"fanSize":25,"starInvestorFlag":false},"themes":[],"images":[],"coverImages":[],"extraTitle":"","html":"<html><head></head><body><p>Ok</p></body></html>","htmlText":"<html><head></head><body><p>Ok</p></body></html>","text":"Ok","highlighted":1,"essential":1,"paper":1,"likeSize":5,"commentSize":4,"repostSize":0,"favoriteSize":0,"link":"https://laohu8.com/post/604095389","repostId":2190671014,"repostType":4,"repost":{"id":"2190671014","kind":"highlight","weMediaInfo":{"introduction":"Reuters.com brings you the latest news from around the world, covering breaking news in markets, business, politics, entertainment and technology","home_visible":1,"media_name":"Reuters","id":"1036604489","head_image":"https://static.tigerbbs.com/443ce19704621c837795676028cec868"},"pubTimestamp":1639258200,"share":"https://www.laohu8.com/m/news/2190671014?lang=&edition=full","pubTime":"2021-12-12 05:30","market":"us","language":"en","title":"Intel shows research for packing more computing power into chips beyond 2025","url":"https://stock-news.laohu8.com/highlight/detail?id=2190671014","media":"Reuters","summary":"Dec 11 (Reuters) - Research teams at Intel Corp on Saturday unveiled work that the company believes ","content":"<p>Dec 11 (Reuters) - Research teams at Intel Corp on Saturday unveiled work that the company believes will help it keep speeding up and shrinking computing chips over the next ten years, with several technologies aimed at stacking parts of chips on top of each other.</p>\n<p>Intel's Research Components Group introduced the work in papers at an international conference being held in San Francisco. The Silicon Valley company is working to regain a lead in making the smallest, fastest chips that it has lost in recent years to rivals like Taiwan Semiconductor Manufacturing Co and Samsung Electronics Co Ltd .</p>\n<p>While Intel CEO Pat Gelsinger has laid out commercial plans&nbsp;aimed at regaining that lead by 2025, the research work unveiled Saturday gives a look into how Intel plans to compete beyond 2025.</p>\n<p>One of the ways Intel is packing more computing power into chips by stacking up \"tiles\" or \"chiplets\" in three dimensions rather than making chips all as <a href=\"https://laohu8.com/S/AONE.U\">one</a> two-dimension piece. Intel showed work Saturday that could allow for 10 times as many connections between stacked tiles, meaning that more complex tiles can be stacked on top of one another.</p>\n<p>But perhaps the biggest advance showed Saturday was a research paper demonstrating a way to stack transistors - tiny switches that form the most basic building bocks of chips by representing the 1s and 0s of digital logic - on top of one another.</p>\n<p>Intel believes the technology will yield a 30% to 50% increase in the number of transistors it can pack into a given area on a chip. Raising the number of transistors is the main reason chips have consistently gotten faster over the past 50 years.</p>\n<p>\"By stacking the devices directly on top of each other, we're clearly saving area,\" Paul Fischer, director and senior principal engineer of Intel's Components Research Group told Reuters in an interview. \"We're reducing interconnect lengths and really saving energy, making this not only more cost efficient, but also better performing.\"</p>","collect":0,"html":"<!DOCTYPE html>\n<html>\n<head>\n<meta http-equiv=\"Content-Type\" content=\"text/html; charset=utf-8\" />\n<meta name=\"viewport\" content=\"width=device-width,initial-scale=1.0,minimum-scale=1.0,maximum-scale=1.0,user-scalable=no\"/>\n<meta name=\"format-detection\" content=\"telephone=no,email=no,address=no\" />\n<title>Intel shows research for packing more computing power into chips beyond 2025</title>\n<style type=\"text/css\">\na,abbr,acronym,address,applet,article,aside,audio,b,big,blockquote,body,canvas,caption,center,cite,code,dd,del,details,dfn,div,dl,dt,\nem,embed,fieldset,figcaption,figure,footer,form,h1,h2,h3,h4,h5,h6,header,hgroup,html,i,iframe,img,ins,kbd,label,legend,li,mark,menu,nav,\nobject,ol,output,p,pre,q,ruby,s,samp,section,small,span,strike,strong,sub,summary,sup,table,tbody,td,tfoot,th,thead,time,tr,tt,u,ul,var,video{ font:inherit;margin:0;padding:0;vertical-align:baseline;border:0 }\nbody{ font-size:16px; line-height:1.5; color:#999; background:transparent; }\n.wrapper{ overflow:hidden;word-break:break-all;padding:10px; }\nh1,h2{ font-weight:normal; line-height:1.35; margin-bottom:.6em; }\nh3,h4,h5,h6{ line-height:1.35; margin-bottom:1em; }\nh1{ font-size:24px; }\nh2{ font-size:20px; }\nh3{ font-size:18px; }\nh4{ font-size:16px; }\nh5{ font-size:14px; }\nh6{ font-size:12px; }\np,ul,ol,blockquote,dl,table{ margin:1.2em 0; }\nul,ol{ margin-left:2em; }\nul{ list-style:disc; }\nol{ list-style:decimal; }\nli,li p{ margin:10px 0;}\nimg{ max-width:100%;display:block;margin:0 auto 1em; }\nblockquote{ color:#B5B2B1; border-left:3px solid #aaa; padding:1em; }\nstrong,b{font-weight:bold;}\nem,i{font-style:italic;}\ntable{ width:100%;border-collapse:collapse;border-spacing:1px;margin:1em 0;font-size:.9em; }\nth,td{ padding:5px;text-align:left;border:1px solid #aaa; }\nth{ font-weight:bold;background:#5d5d5d; }\n.symbol-link{font-weight:bold;}\n/* header{ border-bottom:1px solid #494756; } */\n.title{ margin:0 0 8px;line-height:1.3;color:#ddd; }\n.meta {color:#5e5c6d;font-size:13px;margin:0 0 .5em; }\na{text-decoration:none; color:#2a4b87;}\n.meta .head { display: inline-block; overflow: hidden}\n.head .h-thumb { width: 30px; height: 30px; margin: 0; padding: 0; border-radius: 50%; float: left;}\n.head .h-content { margin: 0; padding: 0 0 0 9px; float: left;}\n.head .h-name {font-size: 13px; color: #eee; margin: 0;}\n.head .h-time {font-size: 11px; color: #7E829C; margin: 0;line-height: 11px;}\n.small {font-size: 12.5px; display: inline-block; transform: scale(0.9); -webkit-transform: scale(0.9); transform-origin: left; -webkit-transform-origin: left;}\n.smaller {font-size: 12.5px; display: inline-block; transform: scale(0.8); -webkit-transform: scale(0.8); transform-origin: left; -webkit-transform-origin: left;}\n.bt-text {font-size: 12px;margin: 1.5em 0 0 0}\n.bt-text p {margin: 0}\n</style>\n</head>\n<body>\n<div class=\"wrapper\">\n<header>\n<h2 class=\"title\">\nIntel shows research for packing more computing power into chips beyond 2025\n</h2>\n\n<h4 class=\"meta\">\n\n\n<a class=\"head\" href=\"https://laohu8.com/wemedia/1036604489\">\n\n\n<div class=\"h-thumb\" style=\"background-image:url(https://static.tigerbbs.com/443ce19704621c837795676028cec868);background-size:cover;\"></div>\n\n<div class=\"h-content\">\n<p class=\"h-name\">Reuters </p>\n<p class=\"h-time\">2021-12-12 05:30</p>\n</div>\n\n</a>\n\n\n</h4>\n\n</header>\n<article>\n<p>Dec 11 (Reuters) - Research teams at Intel Corp on Saturday unveiled work that the company believes will help it keep speeding up and shrinking computing chips over the next ten years, with several technologies aimed at stacking parts of chips on top of each other.</p>\n<p>Intel's Research Components Group introduced the work in papers at an international conference being held in San Francisco. The Silicon Valley company is working to regain a lead in making the smallest, fastest chips that it has lost in recent years to rivals like Taiwan Semiconductor Manufacturing Co and Samsung Electronics Co Ltd .</p>\n<p>While Intel CEO Pat Gelsinger has laid out commercial plans&nbsp;aimed at regaining that lead by 2025, the research work unveiled Saturday gives a look into how Intel plans to compete beyond 2025.</p>\n<p>One of the ways Intel is packing more computing power into chips by stacking up \"tiles\" or \"chiplets\" in three dimensions rather than making chips all as <a href=\"https://laohu8.com/S/AONE.U\">one</a> two-dimension piece. Intel showed work Saturday that could allow for 10 times as many connections between stacked tiles, meaning that more complex tiles can be stacked on top of one another.</p>\n<p>But perhaps the biggest advance showed Saturday was a research paper demonstrating a way to stack transistors - tiny switches that form the most basic building bocks of chips by representing the 1s and 0s of digital logic - on top of one another.</p>\n<p>Intel believes the technology will yield a 30% to 50% increase in the number of transistors it can pack into a given area on a chip. Raising the number of transistors is the main reason chips have consistently gotten faster over the past 50 years.</p>\n<p>\"By stacking the devices directly on top of each other, we're clearly saving area,\" Paul Fischer, director and senior principal engineer of Intel's Components Research Group told Reuters in an interview. \"We're reducing interconnect lengths and really saving energy, making this not only more cost efficient, but also better performing.\"</p>\n\n</article>\n</div>\n</body>\n</html>\n","type":0,"thumbnail":"","relate_stocks":{"BK4527":"明星科技股","BK4534":"瑞士信贷持仓","BK4529":"IDC概念","BK4533":"AQR资本管理(全球第二大对冲基金)","BK4550":"红杉资本持仓","BK4512":"苹果概念","INTC":"英特尔","BK4141":"半导体产品","BK4554":"元宇宙及AR概念","BK4515":"5G概念","BK4535":"淡马锡持仓"},"is_english":true,"share_image_url":"https://static.laohu8.com/e9f99090a1c2ed51c021029395664489","article_id":"2190671014","content_text":"Dec 11 (Reuters) - Research teams at Intel Corp on Saturday unveiled work that the company believes will help it keep speeding up and shrinking computing chips over the next ten years, with several technologies aimed at stacking parts of chips on top of each other.\nIntel's Research Components Group introduced the work in papers at an international conference being held in San Francisco. The Silicon Valley company is working to regain a lead in making the smallest, fastest chips that it has lost in recent years to rivals like Taiwan Semiconductor Manufacturing Co and Samsung Electronics Co Ltd .\nWhile Intel CEO Pat Gelsinger has laid out commercial plans aimed at regaining that lead by 2025, the research work unveiled Saturday gives a look into how Intel plans to compete beyond 2025.\nOne of the ways Intel is packing more computing power into chips by stacking up \"tiles\" or \"chiplets\" in three dimensions rather than making chips all as one two-dimension piece. Intel showed work Saturday that could allow for 10 times as many connections between stacked tiles, meaning that more complex tiles can be stacked on top of one another.\nBut perhaps the biggest advance showed Saturday was a research paper demonstrating a way to stack transistors - tiny switches that form the most basic building bocks of chips by representing the 1s and 0s of digital logic - on top of one another.\nIntel believes the technology will yield a 30% to 50% increase in the number of transistors it can pack into a given area on a chip. Raising the number of transistors is the main reason chips have consistently gotten faster over the past 50 years.\n\"By stacking the devices directly on top of each other, we're clearly saving area,\" Paul Fischer, director and senior principal engineer of Intel's Components Research Group told Reuters in an interview. \"We're reducing interconnect lengths and really saving energy, making this not only more cost efficient, but also better performing.\"","news_type":1},"isVote":1,"tweetType":1,"viewCount":1153,"commentLimit":10,"likeStatus":false,"favoriteStatus":false,"reportStatus":false,"symbols":[],"verified":2,"subType":0,"readableState":1,"langContent":"CN","currentLanguage":"CN","warmUpFlag":false,"orderFlag":false,"shareable":true,"causeOfNotShareable":"","featuresForAnalytics":[],"commentAndTweetFlag":false,"andRepostAutoSelectedFlag":false,"upFlag":false,"length":2,"xxTargetLangEnum":"ZH_CN"},"commentList":[],"hasMoreComment":false,"orderType":2}

Intel shows research for packing more computing power into chips beyond 2025

评论（4）

热议股票