Looks promising in the long te_老虎社区_美港股上老虎

2021-08-05

Looks promising in the long term. Hold.

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Hold.","highlighted":1,"essential":1,"paper":1,"likeSize":0,"commentSize":0,"repostSize":0,"favoriteSize":0,"link":"https://laohu8.com/post/899175365","repostId":1119138550,"repostType":2,"repost":{"id":"1119138550","kind":"news","pubTimestamp":1628157065,"share":"https://www.laohu8.com/m/news/1119138550?lang=&edition=full","pubTime":"2021-08-05 17:51","market":"us","language":"en","title":"Intel has a plan to go beyond 3nm chips","url":"https://stock-news.laohu8.com/highlight/detail?id=1119138550","media":"engadget","summary":"Its moving past nanometers, in more than one way.\n\nEarlier this year, Intel announced they were plan","content":"<blockquote>\n Its moving past nanometers, in more than <a href=\"https://laohu8.com/S/AONE.U\">one</a> way.\n</blockquote>\n<p>Earlier this year, <a href=\"https://laohu8.com/S/INTC\">Intel</a> announced they were planning toretake the CPU manufacturing leadand \"unquestioned leadership\" in the PC world. These were impressive goals, but what was missing was any sense of how they'd actually achieve them. Now, we finally know Intel's plan.</p>\n<p>Intel's CEO Pat Gelsinger and SVP of Technology Development Dr. Ann Kelleher,laid out the company's plan for the future.For starters, Intel is renaming its manufacturing nodes. What used to be 10nm \"Enhanced Superfin\" is now just \"7.\" This may feel a little duplicitous — \"just wave a wand a you've got better technology!\" — but to be fair to intel, the nanometer measurements of process nodes don't really correspond to anything physical any more, and in terms of density Intel's current 10nm chips are competitive with TSMC and Samsung's 7nm.</p>\n<p>Looking beyond 7nm, Intel is targeting an aggressive release schedule with major product updates happening annually. We're expecting their Alder Lake chips this fall, which will mix high and low-powered cores, followed by now-4nm Meteor Lake chips that will move to a \"tile\" (chiplet) design, and incorporate Intel's <a href=\"https://laohu8.com/S/DDD\">3D</a> stacked-chip technology, Foveros.</p>\n<p>Beyond that, Intel has technology mapped out for an EUV-based 3nm node that will use the high-energy manufacturing process to streamline chip creation, and a \"20A\" for angstrom node. This is one ten-billionth of a meter (meaning it's 2nm), and will be followed by a 18A node that Intel hopes to start moving into production in 2025 for products sometime in the 2nd half of the decade. Again, while node measurements don't really correspond to physical structures any more, a silicon atom is in the area of 2 angstroms wide, so these are seriously tiny transistors.</p>\n<p>This release schedule seems aggressive, and Intel does not have the best track record of meeting targets for new nodes, but if it can even come close to these goals, expect your laptops and desktops to get a huge performance boost in the next few years.</p>","source":"lsy1628157128723","collect":0,"html":"<!DOCTYPE html>\n<html>\n<head>\n<meta http-equiv=\"Content-Type\" content=\"text/html; charset=utf-8\" />\n<meta name=\"viewport\" content=\"width=device-width,initial-scale=1.0,minimum-scale=1.0,maximum-scale=1.0,user-scalable=no\"/>\n<meta name=\"format-detection\" content=\"telephone=no,email=no,address=no\" />\n<title>Intel has a plan to go beyond 3nm chips</title>\n<style type=\"text/css\">\na,abbr,acronym,address,applet,article,aside,audio,b,big,blockquote,body,canvas,caption,center,cite,code,dd,del,details,dfn,div,dl,dt,\nem,embed,fieldset,figcaption,figure,footer,form,h1,h2,h3,h4,h5,h6,header,hgroup,html,i,iframe,img,ins,kbd,label,legend,li,mark,menu,nav,\nobject,ol,output,p,pre,q,ruby,s,samp,section,small,span,strike,strong,sub,summary,sup,table,tbody,td,tfoot,th,thead,time,tr,tt,u,ul,var,video{ font:inherit;margin:0;padding:0;vertical-align:baseline;border:0 }\nbody{ font-size:16px; line-height:1.5; color:#999; background:transparent; }\n.wrapper{ overflow:hidden;word-break:break-all;padding:10px; }\nh1,h2{ font-weight:normal; line-height:1.35; margin-bottom:.6em; }\nh3,h4,h5,h6{ line-height:1.35; margin-bottom:1em; }\nh1{ font-size:24px; }\nh2{ font-size:20px; }\nh3{ font-size:18px; }\nh4{ font-size:16px; }\nh5{ font-size:14px; }\nh6{ font-size:12px; }\np,ul,ol,blockquote,dl,table{ margin:1.2em 0; }\nul,ol{ margin-left:2em; }\nul{ list-style:disc; }\nol{ list-style:decimal; }\nli,li p{ margin:10px 0;}\nimg{ max-width:100%;display:block;margin:0 auto 1em; }\nblockquote{ color:#B5B2B1; border-left:3px solid #aaa; padding:1em; }\nstrong,b{font-weight:bold;}\nem,i{font-style:italic;}\ntable{ width:100%;border-collapse:collapse;border-spacing:1px;margin:1em 0;font-size:.9em; }\nth,td{ padding:5px;text-align:left;border:1px solid #aaa; }\nth{ font-weight:bold;background:#5d5d5d; }\n.symbol-link{font-weight:bold;}\n/* header{ border-bottom:1px solid #494756; } */\n.title{ margin:0 0 8px;line-height:1.3;color:#ddd; }\n.meta {color:#5e5c6d;font-size:13px;margin:0 0 .5em; }\na{text-decoration:none; color:#2a4b87;}\n.meta .head { display: inline-block; overflow: hidden}\n.head .h-thumb { width: 30px; height: 30px; margin: 0; padding: 0; border-radius: 50%; float: left;}\n.head .h-content { margin: 0; padding: 0 0 0 9px; float: left;}\n.head .h-name {font-size: 13px; color: #eee; margin: 0;}\n.head .h-time {font-size: 11px; color: #7E829C; margin: 0;line-height: 11px;}\n.small {font-size: 12.5px; display: inline-block; transform: scale(0.9); -webkit-transform: scale(0.9); transform-origin: left; -webkit-transform-origin: left;}\n.smaller {font-size: 12.5px; display: inline-block; transform: scale(0.8); -webkit-transform: scale(0.8); transform-origin: left; -webkit-transform-origin: left;}\n.bt-text {font-size: 12px;margin: 1.5em 0 0 0}\n.bt-text p {margin: 0}\n</style>\n</head>\n<body>\n<div class=\"wrapper\">\n<header>\n<h2 class=\"title\">\nIntel has a plan to go beyond 3nm chips\n</h2>\n\n<h4 class=\"meta\">\n\n\n2021-08-05 17:51 GMT+8&nbsp;&nbsp;&nbsp;<a href=https://www.engadget.com/intel-laid-out-an-aggressive-plan-to-build-angstrom-scale-transistors-within-the-next-five-years-180020485.html><strong>engadget</strong></a>\n\n\n</h4>\n\n</header>\n<article>\n<div>\n<p>Its moving past nanometers, in more than one way.\n\nEarlier this year, Intel announced they were planning toretake the CPU manufacturing leadand \"unquestioned leadership\" in the PC world. These were ...</p>\n\n<a href=\"https://www.engadget.com/intel-laid-out-an-aggressive-plan-to-build-angstrom-scale-transistors-within-the-next-five-years-180020485.html\">Web Link</a>\n\n</div>\n\n\n</article>\n</div>\n</body>\n</html>\n","type":0,"thumbnail":"","relate_stocks":{"09086":"华夏纳指-U","03086":"华夏纳指","INTC":"英特尔"},"source_url":"https://www.engadget.com/intel-laid-out-an-aggressive-plan-to-build-angstrom-scale-transistors-within-the-next-five-years-180020485.html","is_english":true,"share_image_url":"https://static.laohu8.com/e9f99090a1c2ed51c021029395664489","article_id":"1119138550","content_text":"Its moving past nanometers, in more than one way.\n\nEarlier this year, Intel announced they were planning toretake the CPU manufacturing leadand \"unquestioned leadership\" in the PC world. These were impressive goals, but what was missing was any sense of how they'd actually achieve them. Now, we finally know Intel's plan.\nIntel's CEO Pat Gelsinger and SVP of Technology Development Dr. Ann Kelleher,laid out the company's plan for the future.For starters, Intel is renaming its manufacturing nodes. What used to be 10nm \"Enhanced Superfin\" is now just \"7.\" This may feel a little duplicitous — \"just wave a wand a you've got better technology!\" — but to be fair to intel, the nanometer measurements of process nodes don't really correspond to anything physical any more, and in terms of density Intel's current 10nm chips are competitive with TSMC and Samsung's 7nm.\nLooking beyond 7nm, Intel is targeting an aggressive release schedule with major product updates happening annually. We're expecting their Alder Lake chips this fall, which will mix high and low-powered cores, followed by now-4nm Meteor Lake chips that will move to a \"tile\" (chiplet) design, and incorporate Intel's 3D stacked-chip technology, Foveros.\nBeyond that, Intel has technology mapped out for an EUV-based 3nm node that will use the high-energy manufacturing process to streamline chip creation, and a \"20A\" for angstrom node. This is one ten-billionth of a meter (meaning it's 2nm), and will be followed by a 18A node that Intel hopes to start moving into production in 2025 for products sometime in the 2nd half of the decade. Again, while node measurements don't really correspond to physical structures any more, a silicon atom is in the area of 2 angstroms wide, so these are seriously tiny transistors.\nThis release schedule seems aggressive, and Intel does not have the best track record of meeting targets for new nodes, but if it can even come close to these goals, expect your laptops and desktops to get a huge performance boost in the next few years.","news_type":1},"isVote":1,"tweetType":1,"viewCount":311,"commentLimit":10,"likeStatus":false,"favoriteStatus":false,"reportStatus":false,"symbols":[],"verified":2,"subType":0,"readableState":1,"langContent":"EN","currentLanguage":"EN","warmUpFlag":false,"orderFlag":false,"shareable":true,"causeOfNotShareable":"","featuresForAnalytics":[],"commentAndTweetFlag":false,"andRepostAutoSelectedFlag":false,"upFlag":false,"length":33,"xxTargetLangEnum":"ORIG"},"commentList":[],"isCommentEnd":true,"isTiger":false,"isWeiXinMini":false,"url":"/m/post/899175365"}